ECE 546
Spring 2026 Part of Term 1
Part of Term 1
Jan 20-May 6
Jan 20-May 6
Credit: 4 hours.
Signal integrity aspects involved in the design of high-speed computers and high-frequency circuits; addressing the functions of limitations of interconnects for system-level integration. Topics explored include packaging structures, power and signal distribution, power level fluctuations, skin effect, parasitics, noise, packaging hierarch, multilayer wiring structures as well as the modeling and simulation of interconnects through the use of computer-aided design (CAD) and computational electromagnetics.
Prerequisite: ECE 520.
Section Status updates every 10 minutes.
| CRN | Type | Section | Time | Day | Location | Instructor | Section Details | |
|---|---|---|---|---|---|---|---|---|
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60336
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Lecture
|
E
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1:00PM
-1:50PM
|
MWF
|
4070 Electrical & Computer Eng Bldg
|
Schutt-Aine, J
|
|