ECE 425
Spring 2026 Part of Term 1
Jan 20-May 6
Credit: 3 hours.
Complementary Metal-Oxide Semiconductor (CMOS) technology and theory; CMOS circuit and logic design; layout rules and techniques; circuit characterization and performance estimation; CMOS subsystem design; Very-Large-Scale Integrated (VLSI) systems design methods; VLSI Computer Aided Design (CAD) tools; workstation-based custom VLSI chip design using concepts of cell hierarchy; final project involving specification, design, and evaluation of a VLSI chip or VLSI CAD program; written report and oral presentation on the final project.
3 undergraduate hours. 3 graduate hours. Prerequisite: ECE 385 or CS 233.
| CRN | Type | Section | Time | Day | Location | Instructor | Section Details | |
|---|---|---|---|---|---|---|---|---|
|
33850
|
Laboratory
|
AB1
|
ARRANGED
|
n.a.
|
Location Pending
|
Wang, D
|
|
|
|
33853
|
Lecture
|
AL1
|
2:00PM
-2:50PM
|
MWF
|
1015 Electrical & Computer Eng Bldg
|
Wang, D
|
|
|
|
78541
|
Laboratory
Lecture
|
OL1
OL1
|
ARRANGED
2:00PM
-2:50PM
|
n.a.
MWF
|
Location Pending
Location Pending
|
Wang, D
Wang, D
|
|