ECE 425

Spring 2026 Part of Term 1

Part of Term 1
Jan 20-May 6

Credit: 3 hours.

Complementary Metal-Oxide Semiconductor (CMOS) technology and theory; CMOS circuit and logic design; layout rules and techniques; circuit characterization and performance estimation; CMOS subsystem design; Very-Large-Scale Integrated (VLSI) systems design methods; VLSI Computer Aided Design (CAD) tools; workstation-based custom VLSI chip design using concepts of cell hierarchy; final project involving specification, design, and evaluation of a VLSI chip or VLSI CAD program; written report and oral presentation on the final project.

3 undergraduate hours. 3 graduate hours. Prerequisite: ECE 385 or CS 233.

ECE 425 class schedule data for spring 2026
CRN Type Section Time Day Location Instructor Section Details
33850
Laboratory
AB1
ARRANGED
n.a.
Location Pending
Wang, D
Part of Term:
1
Date Range:
01/20/26-05/06/26
33853
Lecture
AL1
2:00PM -2:50PM
MWF
1015 Electrical & Computer Eng Bldg
Wang, D
Part of Term:
1
Date Range:
01/20/26-05/06/26
78541
Laboratory
Lecture
OL1
OL1
ARRANGED
2:00PM -2:50PM
n.a.
MWF
Location Pending
Location Pending
Wang, D
Wang, D
Part of Term:
1
Date Range:
01/20/26-05/06/26
COURSE EXPLORER
Email: Course Explorer Feedback

OFFICE OF THE REGISTRAR | 901 W. Illinois Street, Urbana, Illinois 61801

Site developed by: Technology Services at Illinois | UNIVERSITY OF ILLINOIS URBANA-CHAMPAIGN
1102 Digital Computer Laboratory | MC-256 | Urbana, IL 61801 | phone 217-244-7000