ECE 427

Fall 2025 Part of Term 1

Part of Term 1
Aug 25-Dec 10

Credit: 4 hours.

Students will work in teams on a semester-long project to design and fabricate their own digital, analog, or mixed-signal chip using modern EDA tools. Each team will propose a design in the form of specifications, write an RTL (or equivalent) model for their chip and its components, design schematics, create a testing/debug strategy, and perform layout, integration, and verification of their chip. Final GDS files will be sent to foundry at the end of semester.

4 undergraduate hours. 4 graduate hours. Prerequisite: Prior experience in hardware design and layout. At least one of ECE 385 or ECE 411 or ECE 425 or ECE 482 or ECE 483.

ECE 427 class schedule data for fall 2025
CRN Type Section Time Day Location Instructor Section Details
80783
Laboratory
Lecture
A
A
ARRANGED
11:00AM -11:50AM
n.a.
TR
Location Pending
3017 Electrical & Computer Eng Bldg
Wang, D
Wang, D
Part of Term:
1
Date Range:
08/25/25-12/10/25
Credit:
4 hours
Section Info:
Students will work in teams on a semester-long project to design and fabricate their own digital, analog, or mixed-signal chip using modern EDA tools. Each team will propose a design in the form of specifications, write an RTL (or equivalent) model for their chip and its components, design schematics, create a testing/debug strategy, and perform layout, integration, and verification of their chip. Final GDS files will be sent to foundry at the end of semester. Prerequisites: ECE 425 and either ECE 411 or ECE 483.
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