ECE 527

Fall 2017 Part of Term 1

Part of Term 1
Aug 28-Dec 13

System-On-Chip Design

SHOW FINAL EXAM SCHEDULE

Credit: 4 hours.

System-on-chip (SOC) design methodology and IP (intellectual property) reuse, system modeling and analysis, hardware/software co-design, behavioral synthesis, embedded software, reconfigurable computing, design verification and test, and design space exploration. Class projects focusing on current SOC design and research. Platform FPGA boards and digital cameras are provided to prototype, test, and evaluate SOC designs.

Prerequisite: ECE 391 and ECE 425.

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ECE 527 class schedule data for fall 2017
	CRN	Type	Section	Time	Day	Location	Instructor	Section Details
	52442	Laboratory Lecture	C C	ARRANGED 11:00AM -12:20PM	n.a. TR	Location Pending Electrical & Computer Eng Bldg	Chen, D Chen, D	Part of Term: 1 Date Range: 08/28/17-12/13/17 Credit: 4 hours Restriction(s): Restricted to Graduate - Urbana-Champaign.