ECE 425
Fall 2016 Part of Term 1
Part of Term 1
Aug 22-Dec 7
Aug 22-Dec 7
Credit: 3 hours.
Complementary Metal-Oxide Semiconductor (CMOS) technology and theory; CMOS circuit and logic design; layout rules and techniques; circuit characterization and performance estimation; CMOS subsystem design; Very-Large-Scale Integrated (VLSI) systems design methods; VLSI Computer Aided Design (CAD) tools; workstation-based custom VLSI chip design using concepts of cell hierarchy; final project involving specification, design, and evaluation of a VLSI chip or VLSI CAD program; written report and oral presentation on the final project.
3 undergraduate hours. 3 graduate hours. Prerequisite: ECE 385 and ECE 411; or CS 233.
Section Status updates every 10 minutes.
| CRN | Type | Section | Time | Day | Location | Instructor | Section Details | |
|---|---|---|---|---|---|---|---|---|
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48121
|
Laboratory
|
AB1
|
ARRANGED
|
n.a.
|
Location Pending
|
Chen, D
|
|
|
|
36897
|
Lecture
|
AL1
|
3:30PM
-4:50PM
|
TR
|
Electrical & Computer Eng Bldg
|
Chen, D
|
|