ECE 462

Spring 2009 Part of Term 1

Part of Term 1
Jan 20-May 6

Logic Design

Credit: 3 hours.

Design of combinational networks, hazards, finite state machines, design of sequential networks in fundamental mode and pulse mode, state reduction, state assignment and races, and fault detection and testing.

Same as CS 462 and MATH 491. Prerequisite: ECE 290 or CS 231.

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ECE 462 class schedule data for spring 2009
	CRN	Type	Section	Time	Day	Location	Instructor	Section Details
	33957	Discussion/ Recitation	C	11:00AM -12:20PM	TR	106B8 Engineering Hall	Vasudevan, S	Part of Term: 1 Date Range: 01/20/09-05/06/09 Credit: 3 hours