ECE 560

Spring 2005 All Classes

All Classes

VLSI in DSP & Communication

Credit: 4 hours.

(ECE 460) Basic concepts in digital signal processing, VLSI design methodologies, VLSI DSP building blocks; algorithm transformation and mapping techniques, high-speed, low-power transforms, applications to digital filtering; basics of finite-field arithmetic, forward-error correction algorithms, and architectures; DSP implementation platforms, programmable DSPs, media processors, FPGAs, ASICs, case studies of multimedia communications systems, video codecs, xDSL and cable modems. Homework and a term project allow students to apply these concepts in the design of VLSI architectures for digital signal processing and communication systems.

Prerequisite: ECE 410

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ECE 560 class schedule data for spring 2005
	CRN	Type	Section	Time	Day	Location	Instructor	Section Details
	41686	Online	ONL	ARRANGED	n.a.	n.a.	Shanbhag, N	Part of Term: XM Date Range: 01/18/05-05/04/05 Section Fee: Graduate - Urbana-Champaign OCE Tuition $608.00 per Bill Hour, Undergrad - Urbana-Champaign OCE Tuition $608.00 per Bill Hour, Graduate - Urbana-Champaign OCE Fees $36.00 per Bill Hour, and Undergrad - Urbana-Champaign OCE Fees $36.00 per Bill Hour. Section Info: Academic Outreach restrictions and assessments apply, see http://www.outreach.uiuc.edu; For course details, please visit http://online.engr.uiuc.edu/descriptions/spring2005.htm. Restriction(s): Restricted to MCS:Computer Sci Online -UIUC, MS:Electrical Engineerng -UIUC, MS:Mechanical Engineerng -UIUC, or NDEG:Grad Nondegree-CE-UIUC.
	39336	Lecture	R	11:00AM -12:20PM	TR	57 Everitt Laboratory	Shanbhag, N	Part of Term: 1 Date Range: 01/18/05-05/04/05 Credit: 4 hours Restriction(s): Restricted to Graduate - Urbana-Champaign.