ECE 512

Fall 2023 Part of Term 1

Part of Term 1
Aug 21-Dec 6

Computer Microarchitecture

SHOW FINAL EXAM SCHEDULE

Credit: 4 hours.

Design of high performance computer systems; instruction level concurrency; memory system implementation; pipelining, superscalar, and vector processing; compiler back-end code optimization; profile assisted code transformations; code generation and machine dependent code optimization; cache memory design for multiprocessors; synchronization implementation in multiprocessors; compatibility issues; technology factors; state-of-the-art commercial systems.

Prerequisite: ECE 511 and CS 426.

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ECE 512 class schedule data for fall 2023
	CRN	Type	Section	Time	Day	Location	Instructor	Section Details
	36995	Lecture-Discussion	G	3:00PM -4:20PM	MW	2015 Electrical & Computer Eng Bldg	Kumar, R	Part of Term: 1 Date Range: 08/21/23-12/06/23 Restriction(s): Restricted to Graduate - Urbana-Champaign.