ECE 512
Fall 2023 All Classes
All Classes
Credit: 4 hours.
Design of high performance computer systems; instruction level concurrency; memory system implementation; pipelining, superscalar, and vector processing; compiler back-end code optimization; profile assisted code transformations; code generation and machine dependent code optimization; cache memory design for multiprocessors; synchronization implementation in multiprocessors; compatibility issues; technology factors; state-of-the-art commercial systems.
Section Status updates every 10 minutes.
| CRN | Type | Section | Time | Day | Location | Instructor | Section Details | |
|---|---|---|---|---|---|---|---|---|
|
36995
|
Lecture-Discussion
|
G
|
3:00PM
-4:20PM
|
MW
|
2015 Electrical & Computer Eng Bldg
|
Kumar, R
|
|