ECE 425
Spring 2020 Part of Term 1
Jan 21-May 6
Credit: 3 hours.
Complementary Metal-Oxide Semiconductor (CMOS) technology and theory; CMOS circuit and logic design; layout rules and techniques; circuit characterization and performance estimation; CMOS subsystem design; Very-Large-Scale Integrated (VLSI) systems design methods; VLSI Computer Aided Design (CAD) tools; workstation-based custom VLSI chip design using concepts of cell hierarchy; final project involving specification, design, and evaluation of a VLSI chip or VLSI CAD program; written report and oral presentation on the final project.
3 undergraduate hours. 3 graduate hours. Prerequisite: ECE 385 and ECE 411; or CS 233.
| CRN | Type | Section | Time | Day | Location | Instructor | Section Details | |
|---|---|---|---|---|---|---|---|---|
|
33850
|
Laboratory
|
AB1
|
ARRANGED
|
n.a.
|
Location Pending
|
Liu, X
|
|
|
|
33853
|
Lecture
|
AL1
|
3:00PM
-3:50PM
|
MWF
|
3017 Electrical & Computer Eng Bldg
|
Aggarwal, A
|
|