ECE 560

Spring 2015 Part of Term 1

Part of Term 1
Jan 20-May 6

Credit: 4 hours.

Basic concepts in digital signal processing, VLSI design methodologies, VLSI DSP building blocks; algorithm transformation and mapping techniques, high-speed, low-power transforms, applications to digital filtering; basics of finite-field arithmetic, forward-error correction algorithms, and architectures; DSP implementation platforms, programmable DSPs, media processors, FPGAs, ASICs, case studies of multimedia communications systems, video codecs, xDSL, and cable modems. Homework and a term project apply these concepts in the design of VLSI architectures for digital signal processing and communication systems.

Prerequisite: ECE 310.

ECE 560 class schedule data for spring 2015
CRN Type Section Time Day Location Instructor Section Details
39336
Lecture
R
12:30PM -1:50PM
TR
Electrical & Computer Eng Bldg
Shanbhag, N
Part of Term:
1
Date Range:
01/20/15-05/06/15
Credit:
4 hours
Restriction(s):
Restricted to Graduate - Urbana-Champaign.
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