ECE 527

Fall 2010 Part of Term 1

Part of Term 1
Aug 23-Dec 8

Credit: 4 hours.

System-on-chip (SOC) design methodology and IP (intellectual property) reuse, system modeling and analysis, hardware/software co-design, behavioral synthesis, embedded software, reconfigurable computing, design verification and test, and design space exploration. Class projects are carried out based on student interests, focusing on current SOC design and research. Platform FPGA boards and digital cameras are provided to prototype, test, and evaluate SOC designs.

Prerequisite: ECE 391 and ECE 425.

ECE 527 class schedule data for fall 2010
CRN Type Section Time Day Location Instructor Section Details
52442
Laboratory
Lecture
C
C
ARRANGED
11:00AM -12:20PM
n.a.
TR
Location Pending
Everitt Laboratory
Chen, D
Chen, D
Part of Term:
1
Date Range:
08/23/10-12/08/10
Credit:
4 hours
Restriction(s):
Restricted to Graduate - Urbana-Champaign.
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